2016 06 12th Conference on PhD Research in Microelectronics and ElectronicsMadeira, R.; P. Oliveira, J.; Paulino, N.,  12th Conference on PhD Research in Microelectronics and Electronics,  june-16, IEEE,  FCT-UNL

This paper describes a method for reducing the output voltage ripple of a SC DC-DC converter. In a SC converter the clock frequency is proportional to the output power, meaning that for low power levels the resulting low frequency value translates into a large output voltage ripple. Since the clock frequency is inversely proportional to the flying capacitance value, it is possible to reduce the output voltage ripple by decreasing the flying capacitance … Learn more